The Impact of Software Architecture on the Cost of Design, Implementation and Verification of Reliable Embedded Systems
thesisposted on 12.09.2013, 08:38 by Noor Azurati Binti Ahmad
The concern of this thesis is the development of software for systems utilising embedded processors. In many cases, the safety of users of “embedded systems” (and other people in the immediate vicinity) depends on the correct operation of this software. This project explores the ways in which the cost of designing, implementing and verifying the behaviour of systems that include embedded software can be reduced. More specifically, the goal is to determine the extent to which the use of a time-triggered (TT) architecture - as opposed to an equivalent “event triggered” (ET) architecture - could offer benefits to the developers of reliable embedded systems. To evaluate this, a method of software architecture evaluation was developed and is described. The work detailed in this thesis involved an extensive empirical study of the costs involved in testing TT systems, with and without task pre-emption. Factors considered in this comparison included: [i] implementation costs, including code size, overhead, memory and CPU utilisation of a scheduler; [ii] testing costs, including the ease of obtaining timing data for isolated and in-situ tasks; and [iii] design costs, including execution time, lines of code and number of inputs required to perform a test of schedulability on the task set. The results from empirical studies suggested the use of TT architectures (compared with equivalent designs based on ET architectures) would require greater efforts at the design phase, but lower efforts during the testing phases. The results also suggested systems based on TT designs are likely to have lower implementation costs than equivalent systems based on ET designs. Taken together, the results point to a lower overall cost for TT systems. Execution of the method is described through the presentation of experimental case studies. Throughout these activities, the method has been shown to be a capable tool for software architecture evaluation.